David I. August
Professor in the Department of Computer Science, Princeton University
Affiliated with the Department of Electrical Engineering, Princeton University
Ph.D. May 2000, Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign

Office: Computer Science Building Room 221
Email: august@princeton.edu
Phone: (609) 258-2085
Fax: (609) 964-1699
Administrative Assistant: Pamela DelOrefice, (609) 258-5551

Front Page Publication List (with stats) Curriculum Vitae (PDF) The Liberty Research Group

My primary research interests are in synergistic compiler and microarchitecture design.
I lead the Liberty Research Group.
We are interested in hiring post-doctoral researchers.
STUDENTS: Before contacting me about joining my group read this.

Selected Publications (See Publication List or Curriculum Vitae (PDF) for full list.)
  • Parcae: A System for Flexible Parallel Execution (PLDI 2012, related work at PLDI 2011)
  • Speculative Separation for Privatization and Reductions (PLDI 2012)
  • A Survey of the Practice of Computational Science (SC 2011)
  • Automatic CPU-GPU Communication Management and Optimization (PLDI 2011, related work at CGO 2012)
  • Commutative Set: A Language Extension for Implicit Parallel Programming (PLDI 2011)
  • Scalable Speculative Parallelization on Commodity Clusters (MICRO 2010, related work at CGO 2012)
  • DAFT: Decoupled Acyclic Fault Tolerance (PACT 2010, selected for IJPP 2012)
  • Speculative Parallelization Using Software Multi-threaded Transactions (ASPLOS 2010)
  • Revisiting the Sequential Programming Model for Multi-Core (IEEE Micro’s "Top Picks" 2008, original work at MICRO 2007)
  • Automatic Instruction-Level Software-Only Recovery Methods (IEEE Micro’s "Top Picks" 2007, original work at DSN 2006)

  • Selected Professional Activities (See Curriculum Vitae (PDF) for full list.)
  • Program Chair: MICRO 2009 (with José Martínez)
  • Program Committees: ISCA 2007, PLDI 2008, MICRO 2010, ASPLOS 2011, Top-Picks 2012
  • Panel: "Are New Programming Languages Needed to Exploit Manycore Architectures?" at the Microsoft Faculty Summit, July 2007.
  • Panel: "Programming Languages/Models and Compiler Technologies" at the Manycore Computing Workshop, June 2007.
  • Program Chair: CGO 2007 (Record submission rate!)
  • General Chair: CGO 2006 (Record attendance!)
  • Associate Editor: ACM Transactions on Architecture and Code Optimization, IEEE Computer Architecture Letters

  • Selected Recognition (See Curriculum Vitae (PDF) for full list.)
  • Elevation to IEEE Fellow for "contributions to compilers and architectures for multicore and parallel processing systems".
  • Selection of "SWIFT: Software Implemented Fault Tolerance," for The Test of Time Award at The 2015 International Symposium on Code Generation and Optimization (CGO).
  • Selection of Revisiting the Sequential Programming Model for Multi-Core for IEEE Micro’s "Top Picks" special issue for papers "most relevant to industry and significant in contribution to the field of computer architecture" in 2007.
  • Best Paper Award for Fault-tolerant Type Assembly Language at the 2007 ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), June 2007.
  • Selection of Automatic Instruction-Level Software-Only Recovery Methods for IEEE Micro’s "Top Picks" special issue for papers "most relevant to industry and significant in contribution to the field of computer architecture" in 2006.

  • Current Graduate Students


    Nick P. Johnson
    [Publications] Ph.D. Thesis: Static Dependence Analysis in an Infrastructure for Automatic Parallelization, 2015.
    First Position: D.E. Shaw Research

    Taewook Oh
    [Publications] Ph.D. Thesis: Automatic Exploitation of Input Parallelism, 2015.
    First Position: Facebook

    Hanjun Kim
    [Publications] Ph.D. Thesis: ASAP: Automatic Speculative Acyclic Parallelization for Clusters, 2013.
    First Position: Assistant Professor at Postech

    Thomas B. Jablin
    [Publications] Ph.D. Thesis: Automatic Parallelization for GPUs, 2013.
    First Position: Post-Doctoral Researcher with the IMPACT Research Group

    Prakash Prabhu
    [Publications] Ph.D. Thesis: Semantic Language Extensions for Implicit Parallel Programming, 2013.
    First Position: Google

    Jialu Huang
    [Publications] Ph.D. Thesis: Automatically Exploiting Cross-Invocation Parallelism Using Runtime Information, 2013.
    First Position: Goldman Sachs

    Arun Raman
    [Publications] Ph.D. Thesis: A System for Flexible Parallel Execution, 2012.
    First Position: Intel Research

    Yun Zhang
    [Publications] Ph.D. Thesis: Runtime Speculative Software-Only Fault Tolerance, 2012.
    First Position: Goldman Sachs

    Easwaran Raman
    [Publications] Ph.D. Thesis: Parallelization Techniques with Improved Dependence Handling, 2009.
    First Position: Google

    Matthew J. Bridges
    [Publications] Ph.D. Thesis: The VELOCITY Compiler: Extracting Efficient Multicore Execution from Legacy Sequential Codes, 2008.
    First Position: Google

    Bolei Guo
    [Publications] Ph.D. Thesis: Shape Analysis with Inductive Recursion Synthesis, 2008.
    First Position: J. P. Morgan

    Guilherme de Lima Ottoni
    [Publications] Ph.D. Thesis: Global Instruction Scheduling for Multi-Threaded Architectures, 2008.
    First Position: Intel Research

    Neil Vachharajani
    [Publications] Ph.D. Thesis: Intelligent Speculation for Pipelined Multithreading, 2008.
    First Position: Google

    George A. Reis
    [Publications] Ph.D. Thesis: Software Modulated Fault Tolerance, 2008.
    First Position: Google

    Ram Rangan
    [Publications] Ph.D. Thesis: Pipelined Multithreading Transformations and Support Mechanisms, 2007.
    First Position: Post-Doctoral Researcher at IBM Austin Research Laboratory

    Spyridon Triantafyllis
    [Publications] Ph.D. Thesis: Eliminating Scope and Selection Restrictions in Compiler Optimizations, 2006.
    First Position: D. E. Shaw

    David Penry
    [Publications] Ph.D. Thesis: The Acceleration of Structural Microarchitecture Simulation via Scheduling, 2006.
    First Position: Assistant Professor at Brigham Young University

    Manish Vachharajani
    [Publications] Ph.D. Thesis: Microarchitecture Modeling for Design-space Exploration, 2004.
    First Position: Assistant Professor at University of Colorado, Boulder

  • General Computer Science: COS-126 (Fall 2002, Spring 2003, Spring 2008, Fall 2011)
  • Compiling Techniques: COS-320 (Spring 2000, 2001, 2002, 2007, 2010, 2011)
  • Parallelism: COS-598 (Fall 2010)
  • Computer Architecture: COS-471A, COS-471B/ELE-375 (Fall 2003, 2004, 2005)
  • Introduction to Programming Systems: COS-217 (Fall 2006, 2007)
  • Topics in Compilation for Multiprocessors (Spring 2006)
  • Topics in Compiler Construction: COS-598 (Spring 2004)
  • Feedback-Directed Optimization: COS-597 (Fall 2001)
  • Computer Architecture Research Infrastructure: COS-597 (Fall 2000)
  • Synergistic Hardware-Compiler Architecture Design: COS-597 (Fall 1999)